1. Technical Field
This patent Disclosure relates generally to circuitry to control transistor switching, such as may be used in load switching applications.
2. Related Art
For some transistor switching applications, both turn-on delay and slew rate (or rise time) are a design consideration. One such application is load switching in battery powered systems, where various subsystem loads are powered on and off as needed by a power management controller.
One issue in such load switching applications is the control of inrush currents when a load is initially powered on. Inrush currents are typically controlled by controlling transistor slew rate (dV/dt), or rise time, i.e., dV/dt between turn-on and reaching the operational load voltage supplied through the load switch to the load.
FIG. 1 illustrates, for load switch 10 with an NFET switch 11, a common technique for controlling slew rate is by charging the NFET gate capacitance with a fixed current I_slew 21. Before the NFET turns-on, the fixed current source first charges gate capacitance to a threshold voltage VT for the NFET, followed by controlling switch-on slew rate for the output voltage to rise from zero volts to an operational load voltage.
While this Background information is presented in the context of load switching applications, the present Disclosure is not limited to such applications, but is more generally directed to transistor switching control.